ALTERA EMBEDDED DESIGN FOR SOC FPGAs FOR EMBEDDED ONLINE

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BEST ALTERA EMBEDDED DESIGN FOR SOC FPGAs FOR EMBEDDED SYSTEMS ONLINE TRAINING

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Appropriate topics are followed by practical hands-on exercises.
Part 1: Using Qsys to build the Custom Logic
Day 1
Basic concepts
Introduction to Altera SoPC. The Interconnect Fabric and its generation using Qsys. The Nios II processors. Standard Peripherals (SystemID, Jtag UART, On-chip memory, PIO, Timer ).

Introduction to Qsys
Practical Exercise: Create a complete SoPC system and test on the SoCKit.

Introduction to Custom Peripherals and using SystemConsole
High Value of custom peripherals. Avalon bus formats : ST & MM. The Component Editor. Creating & publishing a custom peripheral. Principle and basic use of SystemConsole for System Bring up.
Practical Exercise: Using VHDL to design a Custom peripheral, tested on the SoCKit.

Introduction to Nios II EDS / Eclipse Software Development Environment
Creating a Software Project. Entering and compiling the code. Loading, executing and debugging the code under Eclipse.
Practical Exercise: Creating a software project using the custom Peripheral tested on the SoCKit

Validating the hardware platform by HDL (co)simulation.
Creating the simulation models, behavioral models and BFMs, using ModelSim Altera Edition.
Practical Exercise: RTL Simulation of the SoPC system using ModelSim AE.

Part 2: Altera ARM SoC FPGA Design (2 days)
Day 2
The SoC FPGA Altera families with ARM Cortex A9 MP Embedded Processing units.
Dichitomy Logic Programmable (User Logic) HPS (Hard Processor System). Pin-assignment and pin-sharing issues. Rapid introduction to the HPS System blocks (processors, integrated peripherals, Memory Interfaces, Caches and provisions for data integrity and debugging, interconnects and data flow ).

Configuring the HPS
Clocking, Reset, Configuration source, Boot sources, configuring the bridges with the Programmable (User) side.
Practical Exercise: Creating a complete project and Configuring the HPS.

Building the Communication between HPS and Configurable (User) Logic.
Reviewing and understanding the different links available, and how/when to use them. Mapping User Peripherals in the HPS memory map. Accessing HPS peripherals from the User Logic side.
Practical Exercise: Golden Hardware Reference Design including a User Peripheral for Digital Signal processing on a stream of data.

Introduction to SystemVerilog BFMs and to the verification environment.

Day 3
Hardware to Software Handoff
Principles, tools and files involved. Understanding all the start up phases (from the initial configuration to the working Operating System Linux) with the possible options and boot sources.

SoCAL and HWLIB
Current situation and roadmap. Limitation of bare-metal. AMP vs SMP.

The BSP Editor
Practical Exercise

The ARM Development Environment : DS-5
General functions, code entry, compilation, connection and download to the target. Avoiding pitfalls.

Understanding the Preloader and the tasks it implements.
Practical Exercise: generating the preloader, code inspection, inserting user code and bare-metal debug using DS-5.

Combined Hardware-Software debugging
Practical Exercise:Adaptative Debugging and Cross-triggering.

Presenting the available Embedded Operating Systems
The Linux distribution proposed and maintained by Altera.

Using Streamline tools for Real-time Monitoring and Analysis
Practical Exercise

Part 3: Embedded Linux for SoC FPGAs
Day 4
What is Embedded Linux?
Principles and Jargon.

Rapid Description of the Altera distribution
Yocto (and ngstr m) : why and for whom. Demo: customizing the standard distribution.
Practical Exercise: How to build the Linux Image, program the SD-Card and boot Linux using DS-5.

The main Linux shell commands and services
Practical Exercise: Experimenting with the Altera distribution on the SoCkit. Boot, command line (shell), services, connection to the Ethernet, volume mounting, etc

uBoot
Principle, usefulness.
Practical Exercise: booting from a network, image.

The Device Tree Generator
How to dynamically take user (custom) peripherals located in the programmable side into account.
Practical Exercise: creating and testing a simple driver for the custom DSP processing peripheral.

Software Cross-Development
Coding, compiling, executing and debugging a Linux Application with user peripherals. Practical Exercise: using the previously developed driver in an application.

For more details Please contact LEARNCHASE
www.learnchase.com
Whatsapp: +918123930940
E-mail Id: [email protected]
E-mail id: [email protected]