COMPREHENSIVE SYSTEM C For EMBEDDED SYSTEMS ONLINE TRAINING

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COMPREHENSIVE SYSTEM C For EMBEDDED SYSTEMS ONLINE TRAINING

Structure and Content
Essential C++ for SystemC (2 days)
Day 1
Learn about the differences between C and C++

From C to C++
Header files Function overloading Operator overloading Pass-by-reference const reference Default arguments I/O streams Namespaces Stream manipulators Stream operator overloading Standard string class Stringstreams Static, automatic, and dynamic storage new and delete

Classes and Objects
Learn the principles of object-based design Classes and objects Inline members versus separate compilation Public and private class members Member functions Scope resolution

Special Member Functions
Constructors Destructors Copy constructors Initialization versus assignment Pointers versus objects The assignment operator this Constant objects and members

Vectors
Learn to make the most of the built-in standard classes The C++ standard library Vectors versus arrays Common vector operations Iterators

Day 2
Master the subtleties of object-oriented programming in C++

Subobjects
Class relationships Subobjects versus pointers Initializing members Initializing const members

Inheritance
Learn to exploit the power of object-oriented programming Derived classes Inheritance Protected members Up- and down-casting

Virtual Functions
Delve deeper into object-oriented programming techniques Overriding methods Virtual functions Polymorphism Identifying types at run-time Examples from SystemC Abstract base classes

Templates and Conversions
Advanced C++ features used in the SystemC class libraries Function templates Class templates Examples from SystemC Implicit conversions User-defined conversions

Extra Features
Friends Static members Order of initialization Multiple inheritance Exceptions

Fundamentals of SystemC (3 days)
Day 3
Become proficient in using the features of SystemC

Introduction
Learn the background to SystemC and how SystemC fits into the system-level design flow The architecture of the SystemC release The benefits and risks of adopting SystemC The objectives of transaction-level modeling

Getting Started
Learn how SystemC source code is structured and how to organise files SystemC header files and namespaces Compiling and executing a SystemC model

Modules and Channels
How to describe the structural connections between modules Modules Ports Processes Signals Methods Primitive channels Module instantiation Port binding

Processes and Time
Describing concurrency and the passage of time SC_METHOD SC_THREAD Event finders Static and dynamic sensitivity Time Events Clocks Dynamic processes

The Scheduler
Gain an insight into how SystemC manages the scheduling of processes and events Starting and stopping simulation Elaboration and simulation callbacks The phases of simulation Event notification wait and next_trigger

Day 4
Learn to apply SystemC to modeling data, communication and busses.

SystemC Data Types
Data types for bit-accurate and hardware modeling Signed and unsigned integers Limited and finite precision integers Assignment and truncation Bit and part selects Bit and logic vectors Hexadecimal numbers

Debugging and Tracing
Learn about the facilities provided by SystemC to ease debugging and diagnostics The report hander Customizing report actions Writing trace (vcd) files

Interfaces and Channels
Learn how channels are used to abstract communication and create fast simulation models Hierarchical, primitive and minimal channels Interface method calls SystemC interfaces Port-less channel access The SystemC object hierarchy The class sc_port How to make the most of ports, channels and interfaces sc_export

Bus modeling
Learn the techniques required to write and use bus models in SystemC Master and slave interfaces The execution context of interface method calls Blocking and non-blocking methods Using events and dynamic sensitivity within channels Multi-ports Port binding policies

Day 5
Exploration of the application of Transaction-Level modeling

Additional Features
sc_signal_resolved register_port sc_process_handle Event finders default_event pos vs. posedge vs. posedge_event sc_event_queue request_update and update Passing arguments to spawned processes terminated_event sc_set_stop_mode

Introduction to TLM-2.0
Transaction Level Modeling Virtual platforms The architecture of TLM-2.0 TLM-2.0 coding styles The interoperability layer TLM-2.0 utilities Initiator, target, and interconnect Initiator and target sockets Generic payload Response status

Further TLM-2.0
Software execution and simulation The time quantum b_transport Timing annotation Temporal decoupling The quantum keeper Base protocol rules DMI Simple sockets Extensions Interoperability

Supplementary Subjects
Fixed Point Types
Fixed point word length and integer word length Quantization modes Overflow modes Fixed point context The type cast switch Utility methods

Overview of SystemC Synthesis
RTL versus behavioural synthesis technology The work of the OSCI synthesis working group Synthesizable data types Synthesis restrictions Clocked threads and resets

Overview of the SystemC Verification Library
Introduction to and aims of SCV Constrained random verification methodology Extended data types to support introspection Randomization Transaction Recording

For more details Please contact LEARNCHASE
www.learnchase.com
Whatsapp: +918123930940
E-mail Id: [email protected]
E-mail id: [email protected]