DEVELOPING WITH ARM CORTEXM For ONLINE TRAINING

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DEVELOPING WITH ARM CORTEX-M For EMBEDDED SYSTEMS ONLINE TRAINING

Content
The following is representative of the public class agenda followed which includes participants requiring content covering M7 capability as well as M4, M3 and M0.

Day 1
Introduction to ARM
ARM as a company Processor portfolio Supported architectures Processor profiles

Cortex-M Overview
Block diagram Architectural features Instruction set Programmer's model Memory map Memory interfaces Caches Exception handing Memory protection Power management Implementation options

Tools Overview for ARM Microcontrollers
Keil MDK ULINK/DSTREAM debug adapters Development boards DS-5

Cortex-M Programmers' Model
Data types Core registers Modes, privileges and stack Exceptions Instruction set overview

Assembly Programming
Data processing instructions Load/Store instructions Flow control Miscellaneous instructions

Day 2
ARMv7-M Exception Handling
Exception Model Interrupts Writing the vector table and interrupt handlers Internal exceptions and RTOS support Fault exception

ARMv7-M Memory Model
Memory address space Memory types and attributes Alignment and endianness Barriers

Understanding Barriers
Data memory barrier Data synchronization barrier Instruction synchronization barrier Barrier applications examples

Day 3
Embedded Software Development
Default compilation behavior System startup Tailoring the image memory map to a device Post startup initialization Tailoring the C library to a device Building and debugging an image

ARMv7-M Compiler Hints & Tips
Basic Compilation Compiler optimisations Coding considerations Mixing C/C++ and assembly Local and global data issues

ARMv7-M Linker and Libraries Hints & Tips
Linking basics System and user libraries Veneers Stack issues Linker optimisations and diagnostics ARM supplied libraries

Day 4
ARMv7-M Synchronization
Introduction to synchronization and semaphores Exclusive accesses Bit-banding

Extensions (M4/M7)
DSP Floating Point

ARMv7-M Debug
Coresight and debug access port DAP Debug event and reset Flash patch and breakpoint unit (FPB) Data watch point and trace unit (DWT) Instrumentation trace macrocell (ITM) Embedded trace macrocell (ETM) Trace port interface unit (TPIU)

Appendix (Selectively covered depending on time budget)
CMSIS Overview
CMSIS-Core CMSIS-DSP CMSIS-RTOS CMSIS-SVD CMSIS-DAP

ARMv7-M Memory Protection
Memory protection overview Regions overview Regions overlapping Setting up the MPU

Cortex-M Level 1 Sub-Systems (M7)
Caches Tightly coupled memory (TCM) System considerations

Introduction to AMBA Protocols
AXI AHB APB

Exercises
Our hands-on exercises are provided as a self contained virtual machine that can easily be taken away by the students by the end of the class. Our virtual machine works on most operating systems and features a full pre-configured embedded development environment based in industry de-facto standards such as GNU tools and Eclipse. The laboratories work both on pre-installed instruction set simulators and microcontroller development boards. Currently, project files support the STM32 and FRDM boards. Infineon and Texas Instrument boards are currently supported by the tool suite but project files are to be added in the near future.

For our onsite classes, we offer the option to run the laboratories inside Kiel uVision with the Infineon X2Go (XMC1100) development board.

The exercises cover a large spectrum of topics; Starting with assembly programming, data transfers, data processing, flow control, digital signal processing. Exception handling with the implementation priority schemes and pre-emption. Mixing C and assembly to provide a semi-hosted solution.

For more details Please contact LEARNCHASE
www.learnchase.com
Whatsapp: +918123930940
E-mail Id: [email protected]
E-mail id: [email protected]